About

Project description

The CHIPIX65 project has the purpose of exploiting the CMOS 65nm technology on the very front-end electronics for use at future colliders, building core elements in digital and analog electronics and understanding and solve chip integration issues that are particularly important when a sophisticated chip digital circuitry, with an unprecedented amount of transistors, has to be integrated with the very front end analog electronics. Moreover, the radiation hardness of the technology has to be characterized and understood, in particular studying how the performance of electronics are modified, and special circuitry has to be developed to cope with Single Event Upset. We have decided to choose a heavily focused R&D in order to have clear goals and deliverables and an evaluation of the final achievements, implementing the technology on a detector of great interest for the HEP and the INFN, where the requirements on the front end are pushed to the frontier The primary goal of this three years project is to put the basis for the development of an innovative CHIP for a PIXel detector, using a CMOS 65nm technology for the first time in HEP community, for experiments with extreme particle rates and radiation at future High Energy Physics colliders. This effort is shared at international level with the RD53 Collaboration. CHIPIX65 institutes are part of the funding institutions of RD53 and several key roles of the collaboration are covered by CHIPIX65 members. In the three year of the project new circuits will be built and characterized, a digital architecture will be developed and eventually a final assembly of a first prototype will be made.